From Wefer processing report

News from Semiconductor International

IEDM Confronts Logic Scaling Challenges
The International Electron Devices Meeting (IEDM), set for Dec. 6-9 in Baltimore, includes presentations on new annealing techniques, finFETs, compound semiconductors and random telegraph noise. The conference, with 215 paper presentations, will be preceded by a Sunday short course on scaling challenges organized by TSMC's Howard C.H. Wang. more » » » 

High-Power Transistors Emerge at CEATEC
Sanken, Fujitsu Laboratories and other Japanese companies introduced high-power transistors, some of them aimed at the growing market for electric vehicles. The SiC- and GaN-based devices were on display at the CEATEC Japan 2009 show. more » » » 

SOI Reduces Dynamic Power, Wafer Costs Coming Down
Silicon-on-insulator (SOI) technology is seeking to penetrate the high-volume market for mobile Internet devices and smart phones. An ARM paper at the IEEE International SOI Conference compared power consumption levels for bulk and SOI. And wafer supplier Soitec said its volume wafer prices are now in the $500 range. more » » » 

Foundry Selects Axcelis Optima XE for High-Energy Implant
A major foundry has selected Axcelis Technologies' single-wafer Optima XE for its most advanced production facility. The high-energy implant tool will be used for high-volume manufacturing of a wide variety of logic and memory products, as well as for the development of next-generation devices. more » » » 

Qualcomm's Nowak: 3-D Faces Cost Issues
Qualcomm Director of Advanced Technology Matt Nowak outlined the cost and technology challenges facing 3-D interconnects in a speech at an IEEE 3-D IC conference. "If this technology adds more than 10% to final costs, it will not be widely used in high-volume wireless technology," he said. more » » » 

TSMC and IMEC Create Innovation Incubation Alliance
IMEC and TSMC announced that they have forged an Innovation Incubation Alliance to create a platform enabling the development of innovative product solutions using emerging More than Moore technology options. Integrating extra functionalities with foundry CMOS enables customers to compete in emerging markets. more » » » 

EVG Installs Fusion Wafer Bonding Systems at CIS Fabs
EV Group has completed the installation of two automated fusion bonding systems for 300 mm wafers at a leading semiconductor foundry and at a major consumer electronics manufacturer. The Gemini FB automated production fusion bonding systems will be employed for the production of backside illuminated CMOS image sensors ranging from ultracompact wafer-level cameras for mobile phones to larger form factor high-end image sensors. more » » » 

IBM Readies 32 nm eDRAM With Low Latency
IBM unveiled a 32 nm SOI embedded DRAM, and will provide details at the upcoming IEDM in December. Gary Patton, vice president for IBM's SRDC, said the SOI eDRAM has latency and cycle times of less than 2 nsec, uses 4x less standby power, and has "up to a 1000 times lower soft-error rate (SER), better power savings, and reliability comparable to a similar SRAM." more » » » 

Applied Shipping Topmet Roll-to-Roll Vacuum Coating Systems
Applied Materials has begun shipping multiple Applied Topmet 4450 systems, reported as the largest and fastest roll-to-roll thin-film metal deposition machines, to a customer in Europe. This latest model deposits ultrathin aluminum films on 4.5 m wide rolls of substrate material at 20 m/sec to provide a barrier against oxygen, moisture and ultraviolet radiation for flexible packaging applications. more » » » 

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