Saturday, October 3, 2009

News from Semiconductor International


Intel PMOS Top 5Intel Ramping 32 nm Manufacturing in Oregon
Intel is shipping "large numbers" of 32 nm samples of its Westmere processor to PC vendors for system testing, said Intel Senior Fellow Mark Bohr. "The 32 nm process is certified, and we are loading up our first factory in support of planned Q4 revenue production," he said.more » » » 
Samsung Austin fabSamsung Upgrading Austin NAND Fab
Samsung said it will convert an older 200 mm DRAM fab in Austin into a copper BEOL for the adjacent 300 mm NAND fab. The upgraded Austin fab will be ready for 3X NAND production as early as late 2010.more » » » 
Applied Materials Orders Increased for Wafer Fab EquipmentApplied Sees Jump in Equipment Orders
Applied Materials said orders for wafer fab equipment spiked in the final month of its third fiscal quarter, ending July 26. Foundries increased spending sharply. CEO Mike Splinter said display manufacturers also are looking at better times, driven by flat panel television sales. Sales for the quarter improved to $1.13B. more » » » 
Chartered Fabs Top Graphic (090809Chartered330.jpg)ATIC to Acquire Chartered, Combine It With GlobalFoundries
The Advanced Technology Investment Co. LLC (ATIC, Abu Dhabi) said it will pay ~$3.9B to acquire Chartered Semiconductor Manufacturing Ltd. (Singapore). The addition of Chartered comes just six months after the formation of GlobalFoundries, whose CEO Doug Grose will head up the combined operation. more » » » 
HD Microsystems adhesives3-D IC Technology Continues to Advance
Despite the downturn, several companies announced 3-D interconnect-related advances at SEMICON West. NEC Electronics, CEA-Leti, EV Group, Soitec and others had 3-D news at the show.more » » » 
MEMS applications (081909sandia330.jpg)MEMS Packaging Headed to Wafer Level
MEMS packaging may take an evolutionary leap forward into wafer-level packaging, driven by large IDMs and foundries, analysts said. "The big fabs may end up being the ones doing the innovative MEMS packaging," said Ken Gilleo, founder of packaging consultancy ET-Trends. more » » » 
Day 1 Testimony in TSMC vs. SMIC trialTSMC Hears Charges of IP Leaks, FUD Campaign in Trial With SMIC
In the first full day of testimony in the TSMC vs. SMIC intellectual property trial, TSMC was accused of IP leaks to customers and a series of anti-SMIC "FUD" campaign efforts. TSMC North America president Rick Cassidy spent much of the day on the stand, defending TSMC against allegations raised by SMIC attorney Matthew Reed. more » » » 

Alan Allan, IRTSThis Year, Entire Roadmap Changes
The ITRS will see a new edition go online in December. To get ready, participants met in San Francisco for the ITRS Summer Public Conference held during SEMICON West. New materials and devices are being readied to extend CMOS and to prepare the industry for the day when charge-based devices run out of steam. more » » » 
ST's CIS is in full production with TSV 3-D interconnects.ST-Ericsson Taking 3-D to Mobile Phones
ST-Ericsson has a roadmap for commercial wireless products that includes what could be the first true 3-D ICs using TSVs. The memory-logic stack also will move to 3-D interconnects, driven by "the increased bandwidth required by the final application," said Yan Guillou, an ST-Ericsson manager. more » » » 
Nemotek TechnologieWafer-Level Packaging in Africa?
Yes, Africa. Nemotek Technologie is manufacturing wafer-level optics and packaging in its state-of-the-art facility located in Morocco's Rabat Technopolis Park. more » » » 
Intel's dual-core Atom processorOptical Lithography Is Still the Technology to Beat
Although EUV lithography is widely considered the prime candidate for post-optical lithography, the only available option to support 15 nm logic development in 2011-2012 is 193 nm immersion lithography with pitch division, said Yan Borodovsky, Intel's director of advanced lithography. more » » » 
Chipworks, Samsung CISChipworks Inside Angle: DSLR Image Sensor Innovation -- Who Is Challenging Canon and Nikon's Lead?
Chipworks' Image Sensor Sector Analyst Ray Fontaine blogs about teardowns of new image sensors from Panasonic, Pentax and others, which are challenging the twin DSLR giants, Canon and Nikon. more » » » 
Marco Mora deposition in TSMC vs. SMICMora Grilled in TSMC vs. SMIC Deposition
Marco Mora, now the COO at SMIC, was deposed in video testimony taken in Shanghai, China, about alleged transfers of process recipes in 2000 and 2001 from TSMC. The deposition was shown to the jury Monday in the TSMC vs. SMIC civil trial being held in Oakland, Calif.more » » » 
SMIC TS (091009SMIC330.jpg)TSMC vs. SMIC Trial Commences in Oakland
The intellectual property trial between TSMC and SMIC began last Wednesday with opening remarks by attorneys. The two companies entered into a comprehensive legal settlement in 2005, with SMIC paying TSMC $175M to resolve allegations that SMIC obtained TSMC's process recipes and other trade secrets. However, further conflicts between the rival foundries resulted in the current lawsuit. more » » » 
Hitachi MEMS (090309MEMS330.jpg)Hitachi Creates MEMS Sensor Process
Hitachi researchers have developed a method to form cavities in the interconnect layers of CMOS ICs, allowing MEMS sensors to be created in the wiring layers. The technology results in ultrasmall, single-chip solutions, and will be applied to tire pressure sensors and other MEMS devices, Hitachi said. more » » » 
GlobalFoundries Fab 2GlobalFoundries Breaks Ground in Malta
GlobalFoundries held a groundbreaking ceremony for Fab 2 in Malta, N.Y. The foundry's goal is to have the first tool move in by October 2011, with qualification coming in early 2012 and commercial production by the second half of 2012. The event marks "a significant shift in momentum" for chip manufacturing in the United States, said Norm Armour, Fab 2 general manager. more » » » 
3-D Integration - Wafer newsletterEvaluating the Risks and Benefits of 3-D Technology
In this article from Pol Marchal and Mieke Van Bavel of IMEC, the authors show how a pathfinding methodology, a virtual chip design flow and an associated tool chain can be combined to help find the 
3-D manufacturing technology/design sweetspot. more » » » 

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