Tuesday, September 22, 2009

IBM Readies 32 nm eDRAM With Low Latency

News from Semiconductor International


IBM 32 nm (092109IBMeDRAM330.jpg)
IBM unveiled a 32 nm SOI embedded DRAM, and will provide details at the upcoming IEDM in December. Gary Patton, vice president for IBM's SRDC, said the SOI eDRAM has latency and cycle times of less than 2 ns, uses 4 times less standby power, and has "up to a 1000 times lower soft-error rate (SER), better power savings, and reliability comparable to a similar SRAM." more » » » 

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